VMIPCI 5588-101 High Speed Fiber Optic Reflective Memory with Interrupts
- High-speed, easy-to-use fiber-optic network (1.2 Gbaud serially)
- Data written to memory in one node is also written to memory in all nodes on the network
- Up to 256 nodes
- Connection with multimode fiber up to 1,000 ft; single-mode fiber up to 10 km or twinax cable up to 30 m
- Data transferred at 29.5 Mbyte/s without redundant transfer
- Data transferred at 14.8 Mbyte/s with redundant transfer
- Any node on the network can generate an interrupt in any other node on the network or in all network nodes with a single command
- Error detection
- Redundant transmission mode for suppressing errors
- No processor overhead
- No processor involvement in the operation of the network
- Up to 16 Mbyte of Reflective Memory
- D32:D16:D8 memory access
- Single PCI 5 V slot, standard long card
- PCI target data bursts supported with 44 Mbyte/s transfer rates
- PCI master DMA controller (optional). DMA transfer rates of 132 Mbyte/s maximum and 33 Mbyte/s sustained.
- Configurable endian conversions for multiple CPU architectures on the network
- Communication link compatible with VMIVME-5588 and VMIPMC-5588
- Software-addressable digital output bit available at output connector for use with optical switch board or any user-defined purpose
- Windows NT® OS driver available which operates the VMIPCI-5588 as aTCP/IP and other protocol connectivity on a f VMIPCI-5588 or VMIVME-5588 nodes.
VMIPCI-5588 Reflective Memory interface allows data to be shared between up to 256 independent systems (nodes) at rates up to 29.5 Mbyte/s. Each Reflective Memory board may be configured with 256 Kbyte to 16 Mbyte of on-board SRAM. The local SRAM provides fast Read access times to stored data. Writes are stored in local SRAM and broadcast over a high-speed fiber-optic data path to other Reflective Memory nodes. The transfer of data between nodes is software transparent, so no I/O overhead is required. Transmit and Receive FIFOs buffer data during peak data rates to optimize CPU and bus performance to maintain high data throughput.
The Reflective Memory also allows interrupts to one or more nodes by writing to a byte register. These interrupt (three levels, each user definable) signals may be used to synchronize a system process, or used to follow any data. The interrupt always follows the data to ensure the reception of the data before the interrupt is acknowledged.The VMIPCI-5588 requires no initialization unless the user desires to use interrupts, endian byte swapping, or an external mode bypass switch such as the VMIVME-5591.